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This study aims to investigate the influence of parent company personnel embedding on the stock price crash risk (SPCR) of listed companies, along with the moderating effect of disparate locations between parent and subsidiary companies and other major shareholders.

This research empirically tests hypotheses based on a sample of listed subsidiaries in China during the period between 2006 and 2021.

Our results demonstrate that personnel embeddedness in the parent company significantly alleviates SPCR in subsidiaries. This effect is even more substantial when the parent and subsidiary companies are in different places. However, other major shareholders in the subsidiary company weaken it. Our additional analysis indicates that, relative to executive embeddedness, director embeddedness exerts a stronger effect on the SPCR of the subsidiary. Mechanism examination reveals that the information asymmetry and the level of internal control (IC) within the subsidiary are significant channels through which the personnel embeddedness from the parent company influences the SPCR of the subsidiary.

This study expands the literature on how personnel arrangements in corporate groups within emerging countries influence SPCR. We have extended the traditional concept of interlocking directorates to corporate groups, thereby broadening the understanding of the governance effects of interlocking directors and executives from a group perspective.

An annual substation equipment failure report says 3/7 capacitive voltage transformer (CVT) got damaged because of ferroresonance overvoltage. The conventional mitigation circuit fails to protect the transformer as the overvoltage may fall in the range between 2 and 4 per unit. It is necessary to develop a device to suppress the overvoltage as well as overcurrent of the CVT. This study aims to propose the suitability of memristor emulator as a mitigation circuit for ferroresonance.

The literature implies that a nonlinear circuit can protect the transformer against ferroresonance. An attempt is made with a memristor emulator using Operational Amplifier (OPAMP) for the mitigation of ferroresonance in a prototype transformer. The circuit is simulated using PSpice and validated for its ideal characteristics using hardware implementation. The nonlinear memductance is designed which is required to mitigate the ferroresonance. The mitigation performance has been compared with conventional method along with fast Fourier transform (FFT) analysis.

While the linear resistor recovers the secondary voltage by 74.1%, the memristor emulator does it by 82.05% during ferroresonance. Also, the total harmonic distortion (THD) of ferroresonance signal found to be 22.06% got improved as 2.56% using memristor emulator.

The suitability of memristor emulator as a mitigation circuit for ferroresonance is proposed in this paper. As ferroresonance occurs in instrument transformers which have extra high voltage (EHV) rated primary windings and (110 V/[110 V/1.732]) rated secondary windings, the mitigation device is proposed to be connected as a nonlinear load across the secondary windings of the transformer. This paper discusses the preliminary work of ferroresonance mitigation in a prototype transformer. The mitigation circuit may have memristor or meminductor for ferroresonance mitigation when they are commercially available in future.

The electronic component-based memristor emulator may not work at 110 V practically as they may be rated at low power. Hence, chemical component-based memristor emulator was developed to do the same. The authors like to clarify that the memristor will be a solution for ferroresonance in future not the memristor emulator circuit.

With the real form of memristor, the transistor world will be replaced by it and may have a revolution in the field of electronics, VLSI, etc. This contribution attempts to project the use of memristor in a smaller scale in high-voltage engineering.

The electronic component-based memristor emulator is proposed as a mitigation circuit for ferroresonance. The hypothesis has been verified successfully in a prototype transformer. Testing circuit of memristor emulator involves transformer, practically. The mitigation performance has been compared with conventional method technically and justified with FFT analysis.